Name: Leakage Optimization Techniques (en Inglés)
Price: 218.74 PEN
Availability: InStock
Author: Khursheed, Afreen ; Khare, Kavita
ISBN: 9786200786647

portada Leakage Optimization Techniques (en Inglés)

Leakage Optimization Techniques (en Inglés)

Formato

Libro Físico

Autor

Afreen Khursheed

Kavita Khare

Editorial

LAP Lambert Academic Publishing

Idioma

Inglés

N° páginas

Encuadernación

Tapa Blanda

Dimensiones

22.9 x 15.2 x 0.6 cm

Peso

0.15 kg.

ISBN13

9786200786647

Categorías

Hardware (o soporte físico del ordenador)

Leakage Optimization Techniques (en Inglés)

Afreen Khursheed (Autor) · Kavita Khare (Autor) · LAP Lambert Academic Publishing · Tapa Blanda

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Reseña del libro "Leakage Optimization Techniques (en Inglés)"

Rise in use of battery operated applications gives leakage power dissipation importance over the area and speed considerations.Many portable devices, has energy constraints for longer battery lifetime. Though the subthreshold shows potential toward satisfying the ultra-low-power requirements of portable systems, it holds design issues at device level and circuit level both for Analog IC design. These issues lead to significant increase in the design complexity of integrated circuits. Very few applications addresses these challenges for subthreshold circuit design in an integrated and comprehensive manner. There are many methods for determining the least leakage input vector. In, This book provides a detailed analysis of concerns related to IC performance. For design time technique, Dual threshold CMOS is used; where, transistors with low threshold voltage (Vth) are used in critical paths and high Vth transistors for non-critical paths. Another approach is to use (MTCMOS) in which high threshold voltage transistors are place This book also presents a qualitative summary of the work reported in the literature by various researchers in the design of digital subthreshold circuit.